About the Company & Graduate Programme
Arm is at the heart of the world’s most advanced technology, designing the processors that power everything from tiny IoT sensors to supercomputers and autonomous vehicles. Headquartered in the UK, Arm’s unique business model of licensing intellectual property allows our engineers to influence the global computing landscape significantly. With billions of chips shipped annually containing Arm technology, our influence is unparalleled, making this an extraordinary environment for high-achieving graduates to begin their engineering careers.
Our Graduate Programme is designed to identify and nurture the next generation of technical leaders. We understand that innovation thrives on diversity of thought and academic rigour. As a graduate hire, you will be embedded within cross-functional teams, contributing to real-world silicon design, verification, or physical implementation tasks from day one. This intake is pivotal to our ongoing mission to define the future of computing, providing you with high-visibility projects that directly impact the efficiency and performance of upcoming global architectures.
What You'll Do & Key Responsibilities
- Collaborate with senior architects to translate high-level design specifications into RTL (Register Transfer Level) code using Verilog or SystemVerilog.
- Participate in the end-to-end verification process, utilizing constrained-random testing and UVM methodologies to ensure chip robustness.
- Engage in hands-on performance modelling and power analysis to optimize silicon efficiency for mobile and server-grade hardware.
- Work alongside physical design teams to analyze timing constraints, signal integrity, and floorplanning requirements using industry-standard EDA tools (e.g., Cadence, Synopsys).
- Support senior engineers in debugging complex micro-architectural issues during the pre-silicon validation phase.
- Interact with cross-site stakeholders in regional hubs to streamline design workflows and documentation practices.
- Contribute to the development of automation scripts (Python/TCL) to improve continuous integration pipelines and build efficiency.
- Present technical findings and project status updates to departmental leads, gaining exposure to engineering management and leadership.
Who We Are Looking For & Candidate Eligibility
- Minimum 2:1 degree (or equivalent) in Electronic Engineering, Computer Science, Physics, or Mathematics.
- A deep curiosity about low-level hardware architecture and the passion to understand how software translates into silicon execution.
- Demonstrated ability to solve complex technical problems using algorithmic thinking and logical deduction.
- Strong collaborative mindset with the ability to communicate technical concepts clearly within a multidisciplinary team.
- Proficiency in at least one hardware description language (Verilog/VHDL) or programming language (C/C++ or Python) is essential.
- Proactive approach to learning and a willingness to step outside your comfort zone to master new technologies.
- Right to work in the UK without restriction, or eligibility for the Graduate Route visa (sponsorship available for qualifying candidates).
- Applicants should be graduating in 2024 or 2025 or have completed their degree within the last two years.
Graduate Training, Rotations & Mentorship
Your 18 to 24-month journey at Arm is structured to provide both breadth and depth. During this time, you will undertake two or three rotational placements across different hardware teams—such as CPU design, GPU architecture, or Systems-on-Chip (SoC) verification. This rotational strategy ensures you gain a comprehensive understanding of the chip development lifecycle, preventing early-career siloing and encouraging a holistic engineering perspective.
Mentorship is a cornerstone of our programme. Upon joining, you will be paired with a dedicated 'Buddy' from a previous graduate cohort to help with your onboarding and social integration. Additionally, you will be assigned a senior technical mentor—typically a Principal Engineer—who will guide your professional development and track your progress toward chartership or other professional certifications, such as CEng through the IET. We provide dedicated time and funding for external training, technical conferences, and internal certification pathways to ensure your skills remain at the forefront of the industry.
Salary, Bonus & Benefits Package
- Competitive base salary of £36,000 to £38,000 per annum, subject to experience and academic performance.
- Annual performance-based bonus scheme, typically ranging from 5% to 10% of base salary.
- Generous company pension scheme with up to 10% employer contribution matching.
- 25 days of annual leave plus public holidays and an additional 'Arm Day' for wellbeing.
- Comprehensive private healthcare package for you and your immediate family members.
- Hybrid working allowance to support your home office setup.
- Relocation assistance package available for graduates moving to London or our Cambridge/UK regional offices.
- Access to onsite gym facilities, cycle-to-work schemes, and professional development training budgets.
Recruitment Stages & How to Apply
- Online Application & CV: Submit your application via the portal. Ensure your CV highlights your academic projects, technical skills, and any internship experience.
- Gamified Cognitive & Situational Judgement Tests: Successful applicants will be invited to complete online assessments measuring logic, spatial reasoning, and professional judgement.
- On-Demand Video Interview: A pre-recorded session where you will answer a series of technical and behavioural questions, allowing us to understand your motivations and problem-solving style.
- Virtual Assessment Centre & Technical Presentation: The final stage consists of a half-day virtual event, including a technical deep-dive presentation, group exercises, and a panel interview with senior engineering managers.
We operate on a rolling application basis and vacancies fill rapidly. We strongly encourage early submission to secure your place in our upcoming assessment cycles.